FIG. 1a schematically shows the general organization of a full frame image sensor having an array of photosensitive elements which serve also as vertical shift registers 26. Several of the photosensitive elements which are shown in FIG. 1 are identified as A, B, C, D, E, F, G, H and I. Elements A-D are in one vertical shift register and elements E-I are in adjacent shift register. The elements are arranged in columns and rows. Photo charge is integrated in each sensor element and, at a predetermined time, appropriate bias voltage pulse signals are applied to the gate electrodes causing the charge to transfer along vertical CCD shift register 26. Those skilled in the art will appreciate that the shift registers 26 conveniently can be constructed in two phase buried channel architecture. Each photosensitive element includes two electrodes, 26a and 26b (see FIG. 1c).
Each CCD shift register 26 will be under the control of a plurality of the electrodes 26a and 26b. When a potential is applied to an electrode, a deplete region is formed under that electrode. Consider, for example, a buried channel CCD shift register which is formed with a p-substrate covered with a silicon dioxide layer with an n-buried channel on which there has been deposited a row of closely spaced electrodes for operating a shift register 26. FIGS. 1a-c illustrate a conventional full frame CCD image sensor. If the two electrodes 26a and 26b each contain both a barrier and a storage region, then they provide one complete CCD stage of what we will call a true two phase CCD. Such a two phase CCD is also effective in a non-interlaced interline CCD image sensor. One the electrodes 26b is covered with an opaque shield or covering while the other 26a is exposed to actinic light and accumulated signal charge. (See FIG. 1b). Al or WSi.sub.3 can be sputtered and patterned to form the shield.
The signal charge is shifted vertically down the shift registers, 26, a line at a time, into a horizontal shift register, 27 (see FIG. 1a). The pixel charge information is shifted to a buffer amplifier 28 where it is converted to an output voltage proportional to the pixel charge, and becomes available for off-chip signal processing, storage and/or display.
A desirable feature in image sensors, is antiblooming. Blooming results when an area of the image sensor receives an amount of illumination that generates signal charges in excess of the charge capacity of the photosensitive element of the vertical shift register. The excess charge spreads or "blooms" along the vertical shift register, thus contaminating the signal from other pixels. Blooming control is essential in applications wherein the light level is not controlled. A lateral overflow drain (LOD) is a commonly used technique for controlling antiblooming. See U.S. Pat. No. 4,460,912. Overflow drains have a problem in that they reduce exposure latitude. Typically, after the charge capacity of the photosensitive element is reached, further increases in exposure cannot be measured.
In U.S. Pat. No. 4,626,915 an MOS solid state image sensor is disclosed in which the combined action of a vertical overflow drain (VOD) and vertical readout transfer gate enhances exposure latitude. However, this method suffers from several disadvantages because overflow charge must be removed from the vertical readout. If the vertical registers are bit lines, their capacitance decreases the device voltage sensitivity to photocharge; where as if the vertical readout registers are CCD's, the time required to remove overflowed charge is too long, interferes with readout and overflow timing, and limits the amount of antiblooming achievable. Also, the device construction of the VOD technology is not simple, consisting of 4 alternate n and p layers. Further, the necessity of changing the voltage of the p well induces a general potential fluctuation in other regions of the device which may induce noise and which alters the spectral response of the sensor during integration. The use of a VOD limits the long wavelength sensitivity of the device and requires the device process depend on cell size.